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Please use this identifier to cite or link to this item: http://hdl.handle.net/10263/2575
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dc.contributor.authorRahaman, H-
dc.contributor.authorDas, D K-
dc.contributor.authorBhattacharya, Bhargab B-
dc.contributor.authorDas, S K-
dc.date.accessioned2011-09-19T11:24:20Z-
dc.date.available2011-09-19T11:24:20Z-
dc.date.issued2006-
dc.identifier.citationJournal of electronic testing - theory and applicationsV22,2,P125-142en_US
dc.identifier.urihttp://hdl.handle.net/10263/2575-
dc.language.isoenen_US
dc.subjectSymmetric functionsen_US
dc.subjectHierarchicalen_US
dc.titleMapping symmetric functions to hiererchical modules for path-delay fault testabilityen_US
dc.typeArticleen_US
Appears in Collections:Mathematics and Statistics

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