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Please use this identifier to cite or link to this item: http://hdl.handle.net/10263/2783
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dc.contributor.authorBishnu, A-
dc.contributor.authorBhattacharya, Bhargab B-
dc.contributor.authorKundu, Malay K-
dc.contributor.authorMurthy, C A-
dc.contributor.authorAcharya, Tinku-
dc.date.accessioned2012-01-03T14:43:07Z-
dc.date.available2012-01-03T14:43:07Z-
dc.date.issued2005-
dc.identifier.citationJournal of systems architecture,V51,P470-487en_US
dc.identifier.urihttp://hdl.handle.net/10263/2783-
dc.language.isoenen_US
dc.subjectEuler numberen_US
dc.subjectImage processingen_US
dc.subjectPipeline architectureen_US
dc.subjectVLSI implementationen_US
dc.titleA pipeline architechture for computing euler number of a binary imageen_US
dc.typeArticleen_US
Appears in Collections:Computer Science

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