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Please use this identifier to cite or link to this item: http://hdl.handle.net/10263/3527
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dc.contributor.authorMaulik, Ujjwal-
dc.contributor.authorBandyopadhyay, Sanghamitra-
dc.contributor.authorBhattacharya, S-
dc.date.accessioned2012-04-24T15:34:42Z-
dc.date.available2012-04-24T15:34:42Z-
dc.date.issued2000-
dc.identifier.citationJournal of system architecture,V46,P297-300en_US
dc.identifier.urihttp://hdl.handle.net/10263/3527-
dc.language.isoenen_US
dc.subjectFault tolerant routingen_US
dc.subjectInterconnection networken_US
dc.subjectPermutationen_US
dc.subjectStuck-at -faulten_US
dc.titleFault tolerant permutation mapping in multistage interconnection networken_US
dc.typeArticleen_US
Appears in Collections:Electronics

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