Please use this identifier to cite or link to this item: http://hdl.handle.net/10263/3853
Title: Synthesis of symmetric functions for path delay fault testability
Authors: Chakrabarti, S
Das, S
Das, D K
Bhattacharya, Bhargab B
Keywords: Delay fault
Symmetric boolean function
Synthesis for testibility
Issue Date: 2000
Citation: IEEE Transaction on CAD,V19,P1076-1081
URI: http://hdl.handle.net/10263/3853
Appears in Collections:Computer Science

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