Please use this identifier to cite or link to this item: http://hdl.handle.net/10263/4373
Title: Fast Parallel algorithm for ternary multiplication using multivariate I L technology
Authors: De, Mallika
Sinha, Bhabani P
Keywords: Balanced ternary logic
Coloum compression
Ternary multiplication
Systolic architecture
Issue Date: 1994
Citation: IEEE transaction of computors,V43,P603-607
URI: http://hdl.handle.net/10263/4373
Appears in Collections:Electronics

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