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Please use this identifier to cite or link to this item: http://hdl.handle.net/10263/4654
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dc.contributor.authorNandy, Subhas C-
dc.contributor.authorNandakumar, G N-
dc.contributor.authorBhattacharya, Bhargab B-
dc.date.accessioned2012-10-30T11:28:45Z-
dc.date.available2012-10-30T11:28:45Z-
dc.date.issued1997-12-
dc.identifier.citationComputers and Mathematics with Applications, V.34, no. 12 , p. 121-135en_US
dc.identifier.urihttp://hdl.handle.net/10263/4654-
dc.language.isoenen_US
dc.subjectVLSI layouten_US
dc.subjectparallel graphsen_US
dc.subjectGraph theoryen_US
dc.subjectMaxcuten_US
dc.titleEfficient algorithms for single- and two-layer linear placement of parallel graphsen_US
dc.typeArticleen_US
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