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Please use this identifier to cite or link to this item: http://hdl.handle.net/10263/5287
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dc.contributor.authorMaulik, Ujjwal-
dc.contributor.authorBandyopadhyay, Sanghamitra-
dc.contributor.authorBhattacharya, S-
dc.date.accessioned2013-02-28T11:51:54Z-
dc.date.available2013-02-28T11:51:54Z-
dc.date.issued2000-
dc.identifier.citationJournal of System Architecture, v. 46, p. 297 - 300en_US
dc.identifier.urihttp://hdl.handle.net/10263/5287-
dc.language.isoenen_US
dc.subjectFault tolerant permutation mappingen_US
dc.subjectMultistage interconnection networken_US
dc.titleFault tolerant permutation mapping in multistage interconnection networken_US
dc.typeArticleen_US
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