Please use this identifier to cite or link to this item:
http://hdl.handle.net/10263/6385| Title: | Multi-layer floorplanning for partial reconfiguration of FPGA devices |
| Authors: | Chakraborty, Chiranjit |
| Keywords: | VLSI FPGA Floor planning |
| Issue Date: | 2009 |
| Publisher: | Indian Statistical Institute, Kolkata |
| Citation: | 50p. |
| Series/Report no.: | Dissertation;2009-227 |
| Description: | Dissertation under the supervision of Prof. Susmita Sur-Koley |
| URI: | http://hdl.handle.net/10263/6385 |
| Appears in Collections: | Dissertations - M Tech (CS) |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Diss-227.pdf | Dissertation is the original PDF | 1.43 MB | Adobe PDF | View/Open |
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