Please use this identifier to cite or link to this item:
Title: Scan path architecture for low power testing
Authors: Srivastava, Praveen
Keywords: Scan design
Scan architecture
Low power testing
Issue Date: 2004
Publisher: Indian Statistical Institute, Kolkata
Citation: 35p.
Series/Report no.: Dissertation;2004-122
Description: Dissertation under the supervision of Prof. Bhargab B. Bhattacharya
Appears in Collections:Dissertations

Files in This Item:
File Description SizeFormat 
DISS-122.PDFDissertation is the original PDF5.47 MBAdobe PDFView/Open

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.