Please use this identifier to cite or link to this item: http://hdl.handle.net/123456789/6385
Title: Multi-layer floorplanning for partial reconfiguration of FPGA devices
Authors: Chakraborty, Chiranjit
Keywords: VLSI
FPGA
Floor planning
Issue Date: 2009
Publisher: Indian Statistical Institute, Kolkata
Citation: 50p.
Series/Report no.: Dissertation;2009-227
Description: Dissertation under the supervision of Prof. Susmita Sur-Koley
URI: http://hdl.handle.net/123456789/6385
Appears in Collections:Dissertations

Files in This Item:
File Description SizeFormat 
Diss-227.pdfDissertation is the original PDF1.43 MBAdobe PDFView/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.