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Issue Date
Title
Author(s)
Aug-1989
Via minimization in VLSI routing with movable terminals
Deogun, J S
;
Bhattacharya, Bhargab B
1989
Design of parity testable combinational circuits
Bhattacharya, Bhargab B
1985
On the numerical complexity of short-circuit faults in logic network
Sinha, Bhabani P
;
Bhattacharya, Bhargab B
1986
On the impossible class of faults functions in logic networks under short circuit faults
Bhattacharya, Bhargab B
;
Gupta, Bidyut
1985
Testable design of RMC networks with at and bridging faults
Bhattacharya, Bhargab B
;
Gupta, B
;
Sarkar, S
;
Choudhury, A K
1988
A fast fault simulation algorithms for combinatorials circuits
Ke, W
;
Seth, S C
;
Bhattacharya, Bhargab B
1986
A prarallel algorithm to compute the shortest paths and diameter fo a graph and Its VLSI implementation
Sinha, Bhabani P
;
Bhattacharya, Bhargab B
;
Ghose, Suranjan
;
Srimani, Pradip K
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Srimani, Pradip K
.
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Bridging faults
1
Algorithms
1
Bell numbers
1
Combinational circuit
1
Combinational logic
1
Design automation
1
Diameter
1
Fan-out- free functions
1
fast faults
1
Fault location
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Date issued
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1989
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1988
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1985