dc.contributor.author | Rahaman, H | |
dc.contributor.author | Das, D K | |
dc.contributor.author | Bhattacharya, Bhargab B | |
dc.contributor.author | Das, S K | |
dc.date.accessioned | 2011-09-19T11:24:20Z | |
dc.date.available | 2011-09-19T11:24:20Z | |
dc.date.issued | 2006 | |
dc.identifier.citation | Journal of electronic testing - theory and applicationsV22,2,P125-142 | en_US |
dc.identifier.uri | http://hdl.handle.net/10263/2575 | |
dc.language.iso | en | en_US |
dc.subject | Symmetric functions | en_US |
dc.subject | Hierarchical | en_US |
dc.title | Mapping symmetric functions to hiererchical modules for path-delay fault testability | en_US |
dc.type | Article | en_US |