A pipeline architecture for computing the euler number of a binary image

dc.contributor.author	Bishnu, A
dc.contributor.author	Bhattacharya, Bhargab B
dc.contributor.author	Kundu, Malay K
dc.contributor.author	Murthy, C A
dc.contributor.author	Acharya, Tinku
dc.date.accessioned	2012-01-04T14:22:42Z
dc.date.available	2012-01-04T14:22:42Z
dc.date.issued	2005
dc.identifier.citation	Journal of system acrhitecture,V51,P470-487	en_US
dc.identifier.uri	http://hdl.handle.net/10263/2824
dc.language.iso	en	en_US
dc.subject	Euler number	en_US
dc.subject	Image processing	en_US
dc.subject	Pipeline architecture	en_US
dc.subject	VLSI implementation	en_US
dc.title	A pipeline architecture for computing the euler number of a binary image	en_US
dc.type	Article	en_US