Some combinatorial design in VLSI  architectures  and statistics

dc.contributor.author	Maity, Soumen
dc.date.accessioned	2012-05-01T15:59:39Z
dc.date.available	2012-05-01T15:59:39Z
dc.date.issued	2002-10
dc.identifier.citation	125p,iv	en_US
dc.identifier.uri	http://hdl.handle.net/10263/3642
dc.description	This thesis is under the supervision of Prof.Bimal K Roy	en_US
dc.language.iso	en	en_US
dc.publisher	Indian Statistical Institute,Calcutta	en_US
dc.relation.ispartofseries	ISI Phd thesis;TH125
dc.subject	VLSI architecture	en_US
dc.subject	VLSI linear arrays	en_US
dc.subject	Combinatorial optimization	en_US
dc.title	Some combinatorial design in VLSI architectures and statistics	en_US
dc.type	Thesis	en_US