Synthesis of single-output space compactors for scan-based sequential circuits

dc.contributor.author	Bhattacharya, Bhargab B
dc.contributor.author	Dmitriev, Alexej
dc.contributor.author	Gossel, Michael
dc.contributor.author	Chakrabarty, Krishnendu
dc.date.accessioned	2012-11-19T12:27:26Z
dc.date.available	2012-11-19T12:27:26Z
dc.date.issued	2002-10
dc.identifier.citation	IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,v.21,no.10,p.1171-1179	en_US
dc.identifier.uri	http://hdl.handle.net/10263/4902
dc.language.iso	en	en_US
dc.subject	Synthesis	en_US
dc.subject	Toscan-based IP cores	en_US
dc.subject	space compactors	en_US
dc.title	Synthesis of single-output space compactors for scan-based sequential circuits	en_US
dc.type	Article	en_US