Parallel system design for time- delay neural networks

dc.contributor.author	Zhang, David
dc.contributor.author	Pal, Sankar K
dc.date.accessioned	2013-03-04T12:22:54Z
dc.date.available	2013-03-04T12:22:54Z
dc.date.issued	2000
dc.identifier.citation	IEEETOSMAC, v 30, no 2, p 265-275	en_US
dc.identifier.uri	http://hdl.handle.net/10263/5339
dc.language.iso	en	en_US
dc.subject	Parallel computing	en_US
dc.subject	Pipelined architecture	en_US
dc.subject	Time- delay neural networks	en_US
dc.subject	Speech recognition	en_US
dc.title	Parallel system design for time- delay neural networks	en_US
dc.type	Article	en_US