A deadlock communication kernel for loop architecture

dc.contributor.author	Pramanik, P
dc.contributor.author	Das, P K
dc.contributor.author	Bandyopadhyay, A K
dc.contributor.author	Fay, D Q M
dc.date.accessioned	2014-01-08T08:14:26Z
dc.date.available	2014-01-08T08:14:26Z
dc.date.issued	1991
dc.identifier.citation	Information Processing Letters, v 38, p 157-161	en_US
dc.identifier.uri	http://hdl.handle.net/10263/5747
dc.language.iso	en	en_US
dc.subject	Operating systems	en_US
dc.subject	Parallel processing	en_US
dc.subject	Massage-passing multiprocessors	en_US
dc.subject	Deadlock prevention	en_US
dc.title	A deadlock communication kernel for loop architecture	en_US
dc.type	Article	en_US