General false path problem in timing analysis of combinational circuits

dc.contributor.author	Mani, J V S
dc.date.accessioned	2016-06-30T21:11:52Z
dc.date.available	2016-06-30T21:11:52Z
dc.date.issued	1997
dc.identifier.citation	36p.	en_US
dc.identifier.uri	http://hdl.handle.net/10263/6216
dc.description	Dissertation under the supervision of Dr. Bhargab B. Bhattacharya	en_US
dc.language.iso	en	en_US
dc.publisher	Indian Statistical Institute, Kolkata	en_US
dc.relation.ispartofseries	Dissertation;97-43
dc.subject	Combinational circuit	en_US
dc.subject	False path	en_US
dc.subject	Path problems	en_US
dc.title	General false path problem in timing analysis of combinational circuits	en_US
dc.type	Thesis	en_US