Redundant radix-4 coprocessor architecture implementation

dc.contributor.author	Swamy, Dhoss P
dc.date.accessioned	2016-07-01T19:12:17Z
dc.date.available	2016-07-01T19:12:17Z
dc.date.issued	1999
dc.identifier.citation	33p.	en_US
dc.identifier.uri	http://hdl.handle.net/10263/6238
dc.description	Dissertation under the supervision of Dr. B.P. Sinha	en_US
dc.language.iso	en	en_US
dc.publisher	Indian Statistical Institute, Kolkata	en_US
dc.relation.ispartofseries	Dissertation;99-66
dc.subject	Coprocessors	en_US
dc.subject	Redundant radix-4	en_US
dc.subject	Architecture of RR-4	en_US
dc.title	Redundant radix-4 coprocessor architecture implementation	en_US
dc.type	Thesis	en_US