Multi-layer floorplanning for partial reconfiguration of FPGA devices

dc.contributor.author	Chakraborty, Chiranjit
dc.date.accessioned	2016-07-08T15:29:41Z
dc.date.available	2016-07-08T15:29:41Z
dc.date.issued	2009
dc.identifier.citation	50p.	en_US
dc.identifier.uri	http://hdl.handle.net/10263/6385
dc.description	Dissertation under the supervision of Prof. Susmita Sur-Koley	en_US
dc.language.iso	en	en_US
dc.publisher	Indian Statistical Institute, Kolkata	en_US
dc.relation.ispartofseries	Dissertation;2009-227
dc.subject	VLSI	en_US
dc.subject	FPGA	en_US
dc.subject	Floor planning	en_US
dc.title	Multi-layer floorplanning for partial reconfiguration of FPGA devices	en_US
dc.type	Thesis	en_US