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Networks on chips [electronic resource] : technology and tools / Luca Benini and Giovanni De Micheli.

By: Benini, Luca, 1967-.
Contributor(s): De Micheli, Giovanni.
Material type: TextTextSeries: Morgan Kaufmann series in systems on silicon: Publisher: Amsterdam ; Boston : Elsevier Morgan Kaufmann Publishers, c2006Description: 1 online resource (x, 395 p.) : ill.ISBN: 9780123705211; 0123705215; 9780080473567 (electronic bk.); 0080473563 (electronic bk.).Subject(s): Systems on a chip | Computer networks -- Equipment and supplies | Syst�emes sur une puce | R�eseaux d'ordinateurs -- Appareils et mat�eriel | TECHNOLOGY & ENGINEERING -- Electronics -- Circuits -- Integrated | TECHNOLOGY & ENGINEERING -- Electronics -- Circuits -- General | Systems on a chip | Computer networks / Equipment and supplies | Networks on a chip / Congresses | Systems on a chip | Computer networks / Equipment and supplies | Networks on a chip / CongressesGenre/Form: Electronic books.Additional physical formats: Print version:: Networks on chips.DDC classification: 621.3815 Online resources: EBSCOhost
Contents:
Networks on chip -- Network architecture : principles and examples -- Physical network layer -- The data-link layer in NoC design -- Network and transport layers in networks on chip -- Network interface architecture and design issues -- NoC programming -- Design methodologies and CAD tool flows for NoCs -- Designs and implementations of NoC-based SoCs.
Summary: The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution. This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions. * Leading-edge research from world-renowned experts in academia and industry with state-of-the-art technology implementations/trends * An integrated presentation not currently available in any other book * A thorough introduction to current design methodologies and chips designed with NoCs.
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Includes bibliographical references and index.

Networks on chip -- Network architecture : principles and examples -- Physical network layer -- The data-link layer in NoC design -- Network and transport layers in networks on chip -- Network interface architecture and design issues -- NoC programming -- Design methodologies and CAD tool flows for NoCs -- Designs and implementations of NoC-based SoCs.

The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution. This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions. * Leading-edge research from world-renowned experts in academia and industry with state-of-the-art technology implementations/trends * An integrated presentation not currently available in any other book * A thorough introduction to current design methodologies and chips designed with NoCs.

Description based on print version record.

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Networks on chips by Benini, Luca, ©2006
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