Architectures for computer vision : from algorithm to chip with Verilog / Hong Jeong.
Material type:
TextPublication details: Singapore : John Wiley, ©2014.Description: xv, 450 p. : ill. ; 26 cmISBN: - 9781118659182
- 621.39 23 J54
| Item type | Current library | Call number | Status | Date due | Barcode | Item holds | |
|---|---|---|---|---|---|---|---|
| Books | ISI Library, Kolkata | 621.39 J54 (Browse shelf(Opens below)) | Available | 137079 |
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| 621.39 B892 Remote control by radio | 621.39 H663 Superconductor electronics | 621.39 In61 Advances in multimedia information systems | 621.39 J54 Architectures for computer vision : | 621.39 K45 Scalable computing and communications : | 621.39 K92 Electrical, electronics and computer engineering: for scientists and engineers/ | 621.39 M285 Computer engineering : hardware design / |
Includes bibliographical references and index.
1. Introduction --
2. Verilog HDL, communication, and control --
3. Processor, memory, and array --
4. Verilog vision simulator --
5. Energy function --
6. Stereo vision --
7. Motion and vision modules --
8. Relaxation for energy minimization --
9. Dynamic programming for energy minimization --
10. Belief propagation and graph cuts for energy minimization --
11. Relaxation for stereo matching --
12. Dynamic programming for stereo matching --
13. Systolic array for stereo matching --
14. Belief propagation for stereo matching.
This book provides comprehensive coverage of 3D vision systems, from vision models and state-of-the-art algorithms to their hardware architectures for implementation on DSPs, FPGA and ASIC chips, and GPUs. It aims to fill the gaps between computer vision algorithms and real-time digital circuit implementations, especially with Verilog HDL design.
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