TY  - BOOK
AU  - Jeong,Hong
TI  - Architectures for computer vision: from algorithm to chip with Verilog 
SN  - 9781118659182 
U1  - 621.39 23
PY  - 2014///
CY  - Singapore
PB  - John Wiley
KW  - Verilog (Computer hardware description language)
KW  - Computer vision
N1  - Includes bibliographical references and index; 1. Introduction --
2. Verilog HDL, communication, and control --
3. Processor, memory, and array --
4. Verilog vision simulator --
5. Energy function --
6. Stereo vision --
7. Motion and vision modules --
8. Relaxation for energy minimization --
9. Dynamic programming for energy minimization --
10. Belief propagation and graph cuts for energy minimization --
11. Relaxation for stereo matching --
12. Dynamic programming for stereo matching --
13. Systolic array for stereo matching --
14. Belief propagation for stereo matching
N2  - This book provides comprehensive coverage of 3D vision systems, from vision models and state-of-the-art algorithms to their hardware architectures for implementation on DSPs, FPGA and ASIC chips, and GPUs. It aims to fill the gaps between computer vision algorithms and real-time digital circuit implementations, especially with Verilog HDL design
ER  -